* 550 MHz on 90 nm process (planned to be shrunk to 65 nm for current models
* Based on NV47 Chip (Nvidia GeForce 7800 Architecture)
300+ million transistors
> Multi-way programmable parallel floating-point shader pipelines
- Independent pixel/vertex shader architecture
- 24 parallel pixel-shader ALU pipes
- 5 ALU operations per pipeline, per cycle (2 vector4 , 2 scalar/dual/co-issue and fog ALU, 1 Texture ALU)
- 27 floating-point operations per pipeline, per cycle
> 8 parallel vertex pipelines
- 2 ALU operations per pipeline, per cycle (1 vector4 and 1 scalar, dual issue)
- 10 FLOPS per pipeline, per cycle
> Programmable shader Floating Point Operations per Second: ~200 GFLOPs
- The original marketing claimed 1.8 TFLOPs, this number is believed to include fixed functions such as texture interpolation.
> 24 texture filtering units (TF) and 8 vertex texture addressing units (TA)
- 24 filtered samples per clock
- Maximum texel fillrate: 13.2 GigaTexels per second (24 textures * 550 MHz)
- 32 unfiltered texture samples per clock, ( 8 TA x 4 texture samples )
> 8 Render Output units / pixel rendering pipelines
- Peak pixel fillrate (theoretical): 4.4 Gigapixel per second
- Maximum Z sample rate: 8.8 GigaSamples per second (2 Z-samples * 8 ROPs * 550 MHz)
- Maximum anti-aliasing sample rate: 17.6 GigaSamples per second (4 AA samples * 8 ROPs * 550 MHz)
> Maximum Dot product operations: 51 billion per second
> 128-bit pixel precision offers rendering of scenes with High dynamic range rendering (HDR)
> 256 MB GDDR3 RAM at 700 MHz
- 128-bit memory bus width
- 22.4 GB/s read and write bandwidth
> Cell FlexIO bus interface
- 20 GB/s read to the Cell and XDR memory
- 15 GB/s write to the Cell and XDR memory
> Support for OpenGL ES 2.0
> Support for S3TC texture compression